In this work we use Affine Arithmetic (AA) to estimate the rounding error of different floating-point dot-product implementations. Two floating-point dot-product architectures - a sequential dot-product and a parallel (binary-tree) dot-product - are considered over a wide range of parameters. It is shown that an AA-based probabilistic bounding operator is able to provide a tighter rounding error bound compared to existing techniques. Furthermore, the analytical models for the rounding errors of different floating-point dot-product architectures are derived. As the estimated rounding error bounds are then used for bit width allocation for hardware implementations, the presented error models are key to floating-point code generators and efficient design space exploration.
Contact: Thang Huynh Viet
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1. August 2012 - 31. August 2012