Signal Processing and Speech Communication Laboratory
hometheses & projects › FPGA Implementation of a Neural Network for Radar Interference Mitigation

FPGA Implementation of a Neural Network for Radar Interference Mitigation

In work
Master Thesis
Announcement date
18 May 2020
Michael Hirschmugl
Research Areas

Short Description:

Radar sensors are used for Driver Assistance Systems (ADAS) and Autonomous Driving (AD). Together with Camera and Lidar they are used for environment perception and to provide essential information to higher-level algorithms for object detection, classification, tracking, path planning etc. Machine learning techniques (e.g. Neural Networks) can be used for low-level radar processing in order to improve data quality for these higher-level algorithms and thus enhance the overall results of the autonomous driving application. Particularly in real-world driving scenarios, data pre-processing, denoising and interference mitigation can be crucial for correct detection of objects in the environment and thus influence all the following processing steps.

Radar sensors, as most embedded hardware, have strict hardware constraints in terms of memory and processing capacity. Thus it is required to find resource efficient representations of Deep Neural Network models in order to successfully use them directly on the hardware itself. To this means we are working on resource efficient representations of Convolutional Neural Networks for radar denoising and interference mitigation.

The task is to implement such a resource efficient radar denoising model on an FPGA. To do so, a pre-trained model should be used to create the hardware implementation of the forward pass of newly observed inputs. The model training and evaluation is already implemented and the Python code as well as the final model can be used as a starting point. This work will help us evaluate the effects of hardware acceleration and the result will be a nice demonstrator to illustrate the effectiveness of our models.


  • Experience with FPGA programming
  • Programming skills in at least one hardware description language (e.g. VHDL or Verilog)
  • Interest in efficient hardware implementations of Neural Networks
  • Independent and structured manner of working
  • Experience with Neural Networks, Python and Tensorflow / Tensorflow Lite is a plus but not required