Signal Processing and Speech Communication Laboratory
homeresearch projects › CD-Laboratory for Nonlinear Signal Processing, Module B: Digital Correction of Analog Signal Processing Errors in Fast Analog-to-Digital Converters (ADC)

CD-Laboratory for Nonlinear Signal Processing, Module B: Digital Correction of Analog Signal Processing Errors in Fast Analog-to-Digital Converters (ADC)

Period
2002 — 2009
Funding
Christian-Doppler Forschungsgesellschaft, CDG (Österreich)
Partners
  • Institut für Signalverarbeitung und Sprachkommunikation
  • 1 Großunternehmen (Österreich)
Research Areas
Contact

The goal of the project is the digital correction of analog signal processing errors in fast analog-to-digital converters. Through this digital correction of errors, costs for production of fast converters should be limited and a more flexible adaption of new technologies will be allowed. An analog-to-digital converter is a complex system that causes dynamic, nonlinear, and time-variant errors. In order to determine analog signal processing errors typical high-speed architectures are investigated. The aim of the investigations is the systematic identification of these architectures and their influence on the ideal signal conversion. Identification is achieved through theoretical descriptions, simulation models and measurements of real converters. For all identified systems algorithms will be developed which improve the properties of the converter. These algorithms will be evaluated according to performance and practical applicability.

Related publications
  • Conference contribution Mendel S. & Vogel C. (2007) On the Compensation of Magnitude Response Mismatches in M-channel Time-interleaved ADCs. in 2007 IEEE International Symposium on Circuits and Systems, ISCAS (pp. 3375-3378). [more info]
  • Conference contribution Vogel C. & Johansson H. (2006) Time-Interleaved Analog-to-Digital Converters: Status and Future Directions. in 2006 IEEE International Symposium on Circuits and Systems, ISCAS (pp. 3386-3389). [more info]
  • Patent Vogel C., Draxelmayr D. & Kubin G. (2006) Zeitversetzt arbeitender Analog-Digital-Wandler.. [more info]
  • Conference contribution Vogel C., Draxelmayr D. & Kubin G. (2005) Spectral Shaping of Timing Mismatches in Time-Interleaved ADCs. in 2005 IEEE International Symposium on Circuits and Systems, ISCAS (pp. 1394-1397). [more info]
  • Conference contribution Vogel C., Pammer V. & Kubin G. (2005) A Novel Channel Randomization Method for Time-Interleaved ADCs. in IEEE Instrumentation and Measurement Technology Conference (pp. 150-155). [more info]
  • Patent Vogel C., Draxelmayr D. & Kuttner F. (2005) Schaltungsanordnung zum Kompensieren von Nichtlinearitäten von zeitversetzt arbeitenden Analog-Digital-Wandler.. [more info]
  • Patent Draxelmayr D., Vogel C. & Kuttner F. (2005) Circuit arrangement for compensation for nonlinearities from analog/digital converters operating with different timing.. [more info]
  • Patent Vogel C., Draxelmayr D. & Kuttner F. (2005) Schaltungsanordnung zum Verzögerungsabgleich von zeitversetzt arbeitenden Analog-Digital-Wandlern.. [more info]
  • Patent Vogel C., Draxelmayr D. & Kuttner F. (2005) Circuit arrangement for the delay adjustment of analog-to-digital converters operating in a temporally offset manner.. [more info]
  • Doctoral Thesis Vogel C. (2005) Modeling, Identification, and Compensation of Channel Mismatch Errors in Time-Interleaved Analog-to-Digital Converters.. [more info]
  • Article Vogel C. & Kubin G. (2005) Modeling of Time-interleaved ADCs with Nonlinear Hybrid Filter Banks. in AEÜ = International Journal of Electronics and Communications, 59(5), p. 288-296. [more info] [doi]
  • Article Vogel C. (2005) The Impact of Combined Channel Mismatch Effects in Time-Interleaved ADCs. in IEEE transactions on instrumentation and measurement, 54(1), p. 415-427. [more info] [doi]
  • Conference contribution Vogel C. & Kubin G. (2004) Analysis and Compensation of Nonlinearity Mismatches in Time-Interleaved ADC Arrays. in 2004 IEEE International Symposium on Circuits and Systems, ISCAS (pp. 593-596). [more info]
  • Conference contribution Singerl P. & Vogel C. (2004) An Analysis of a Low Complexity Received Signal Strength Indicator for Wireless Applications. in Austrochip 2004 (pp. 57-60). [more info]
  • Conference contribution Vogel C., Draxelmayr D. & Kuttner F. (2004) Compensation of Timing Mismatches in Time-Interleaved Analog-to-Digital Converters through Transfer Characteristics Tuning. in 47th IEEE International Midwest Symposium On Circuits and Systems (pp. 349-352). [more info]
  • Conference contribution Vogel C. & Kubin G. (2004) Time-Interleaved ADCs in the Context of Hybrid Filter Banks. in 2004 International Symposium on Signals, Systems, and Electronics ISSSE'04 (pp. 214-217). [more info]
  • Commissioned report Vogel C. (2004) Work report on the project Digital Correction of Analog Signal Processing Errors in Fast Analog-to-Digital Converters.. [more info]
  • Conference contribution Vogel C. & Köppl H. (2003) Behavioral Modeling of Time-Interleaved ADCs using MATLAB. in Austrochip 2003 (pp. 45-48). [more info]
  • Commissioned report Vogel C. (2003) Work report on the project Digital Correction of Analog Signal Processing Errors in Fast Analog-to-Digital Converters.. [more info]