Fixed-Point Algorithms for Channel Mismatch Calibration of Time-Interleaved Analog-to-Digital Converters

Project Type: Master/Diploma Thesis
Student: Leopold Alexander


 Compared to conventional ADCs, time-interleaved analog-to-digital-converters (TIADCs) achieve higher sampling rates with low power consumption. The idea is to subsequently convert samples using several ADC channels operated in a cyclic manner. The characteristics of the individual channels, however, deviate from each other due to inherent system asymmetry and fabrication variations. These different characteristics introduce additional errors - mismatches - between the ADC channels. In this work, we propose a digital calibration system for adaptive blind calibration of TIADC offset and gain mismatch errors. It uses computationally inexpensive operations that allow for an efficient hardware implementation of the system. We demonstrate the functionality of the system by giving detailed descriptions of its parts and running simulations with double-precision floating point arithmetics for a simulated broadband input signal. Furthermore, we assess the performance of the system when operating with reduced numerical precision using fixed-point arithmetics. We show that for a 4-channel, 12-bit TIADC model featuring offset, gain and clock skew mismatch errors, a signal-to-noise and distortion ratio (SINAD) above 11 ENOB (effective number of bits) is reached using significantly lower numerical precision than present in comparable work. We also show that the fixed-point calibration system can even outperform the double-precision implementation for the given broadband signal.